Pei-Ning Guo
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
2
Active years
1997–2003
Best venue rank
A*
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2003 | FPGA | A physical retiming algorithm for field programmable gate arrays. | Peter Suaris, Dongsheng Wang, Pei-Ning Guo, Nan-Chi Chou |
| 1999 | DAC | An O-Tree Representation of Non-Slicing Floorplan and Its Applications. | Pei-Ning Guo, Chung-Kuan Cheng, Takeshi Yoshimura |
| 1997 | DAC | Cluster Refinement for Block Placement. | Jin Xu, Pei-Ning Guo, Chung-Kuan Cheng |