Peter Ossieur
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
1
Active years
2014–2024
Best venue rank
C
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2024 | ISCAS | Linearity Enhancement Analysis of Breakdown Voltage Doubler and Demonstration in 60 GBd SiGe BiCMOS Driver. | Kieran De Bruyn, Tinus Pannier, Jakob Declercq, Laurens Breyne, Xin Yin, Peter Ossieur, Johan Bauwelinck |
| 2015 | ISCAS | Design of a sample-and-hold analog front end for a 56Gb/s PAM-4 receiver using 65nm CMOS. | Khosrov Dabbagh-Sadeghipour, Paul D. Townsend, Peter Ossieur |
| 2014 | ISCAS | An inductorless linear optical receiver for 20Gbaud/s (40Gb/s) PAM-4 modulation using 28nm CMOS. | Nasir Abdul Quadir, Paul D. Townsend, Peter Ossieur |