| 2017 | ISCAS | Analog bandwidth mismatch compensation for time-interleaved ADCs using FD-SOI technology. | Alexandre Mas, Eric Andre, Caroline Lelandais-Perrault, Filipe Vinci dos Santos, Philippe Bnabs |
| 2011 | ISCAS | Effective modeling of CT functions for fast simulations using MATLAB-Simulink and VHDLAMS applied to Sigma-Delta architectures. | Philippe Bnabs, Catalin-Adrian Tugui |
| 2011 | ISCAS | Generalized multi-stage closed loop sigma delta modulator. | Van Tam Nguyen, Hussein Fakhoury, Patrick Loumeau, Philippe Bnabs |
| 2010 | ISCAS | Synthesis of Subband Hybrid Filter Banks ADCs with finite word-length coefficients using adaptive equalization. | Zhiguo Song, Caroline Lelandais-Perrault, Daniel Poulton, Philippe Bnabs |
| 2008 | ISCAS | Fixed-step simulation of Continuous-Time SigmaDelta modulators. | Philippe Bnabs, Ali Beydoun |
| 2006 | ISCAS | A hardware efficient 3-bit second-order dynamic element matching circuit clocked at 300MHz. | Esmaeil Najafi Aghdam, Philippe Bnabs |
| 2001 | ISCAS | Bandpass Delta-Sigma modulators synthesis with high loop delay. | Abdeljalil Yahias, Philippe Bnabs, Richard Kielbasa |
| 1997 | DATE | A methodology for designing continuous-time sigma-delta modulators. | Philippe Bnabs, Mansour Keramat, Richard Kielbasa |