| 2016 | HPCA | Best-offset hardware prefetching. | Pierre Michaud |
| 2015 | ISCA | Cost-effective speculative scheduling in high performance processors. | Arthur Perais, Andr Seznec, Pierre Michaud, Andreas Sembrant, Erik Hagersten |
| 2015 | ISPASS | Revisiting symbiotic job scheduling. | Stijn Eyerman, Pierre Michaud, Wouter Rogiest |
| 2015 | MICRO | Long term parking (LTP): criticality-aware resource allocation in OOO processors. | Andreas Sembrant, Trevor E. Carlson, Erik Hagersten, David Black-Schaffer, Arthur Perais, Andr Seznec, Pierre Michaud |
| 2013 | ISPASS | Selecting benchmark combinations for the evaluation of multicore throughput. | Ricardo A. Velsquez, Pierre Michaud, Andr Seznec |
| 2009 | ISPASS | Online compression of cache-filtered address traces. | Pierre Michaud |
| 2004 | HPCA | Exploiting the Cache Capacity of a Single-Chip Multi-Core Processor with Execution Migration. | Pierre Michaud |
| 2003 | ISPASS | A statistical model of skewed-associativity. | Pierre Michaud |
| 2001 | HPCA | Data-Flow Prescheduling for Large Instruction Windows in Out-of-Order Processors. | Pierre Michaud, Andr Seznec |
| 1997 | ISCA | Trading Conflict and Capacity Aliasing in Conditional Branch Predictors. | Pierre Michaud, Andr Seznec, Richard Uhlig |
| 1996 | ASPLOS | Multiple-Block Ahead Branch Predictors. | Andr Seznec, Stphan Jourdan, Pascal Sainrat, Pierre Michaud |