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Po-An Tsai

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

21

Venues

8

Active years

2015–2026

Best venue rank

A*

Where they publish

Papers

21 indexed papers, newest first.

YearVenueTitleAuthors
2026ISCAPatterns Behind Chaos: Forecasting Data Movement for Efficient Large-Scale Moe LLM Inference.Zhongkai Yu, Yue Guan, Zihao Yu, Chenyang Zhou, Zhengding Hu, Shuyi Pei, Yangwook Kang, Yufei Ding, Po-An Tsai
2025ICMLRocketKV: Accelerating Long-Context LLM Inference via Two-Stage KV Cache Compression.Payman Behnam, Yaosheng Fu, Ritchie Zhao, Po-An Tsai, Zhiding Yu, Alexey Tumanov
2024ISCAMind the Gap: Attainable Data Movement and Operational Intensity Bounds for Tensor Algorithms.Qijing Huang, Po-An Tsai, Joel S. Emer, Angshuman Parashar
2024MICROSparsepipe: Sparse Inter-operator Dataflow Architecture with Cross-Iteration Reuse.Yunan Zhang, Po-An Tsai, Hung-Wei Tseng
2023ASPLOSAccelerating Sparse Data Orchestration via Dynamic Reflexive Tiling.Toluwanimi O. Odemuyiwa, Hadi Asghari Moghaddam, Michael Pellauer, Kartik Hegde, Po-An Tsai, Neal Clayton Crago, Aamer Jaleel, John D. Owens, Edgar Solomonik, Joel S. Emer, Christopher W. Fletcher
2023MICRORM-STC: Row-Merge Dataflow Inspired GPU Sparse Tensor Core for Energy-Efficient Sparse Acceleration.Guyue Huang, Zhengyang Wang, Po-An Tsai, Chen Zhang, Yufei Ding, Yuan Xie
2023MICROHighLight: Efficient and Flexible DNN Acceleration with Hierarchical Structured Sparsity.Yannan Nellie Wu, Po-An Tsai, Saurav Muralidharan, Angshuman Parashar, Vivienne Sze, Joel S. Emer
2022ISCASIMDYunan Zhang, Po-An Tsai, Hung-Wei Tseng
2022ISPASSRuby: Improving Hardware Efficiency for Tensor Algebra Accelerators Through Imperfect Factorization.Mark Horeni, Pooria Taheri, Po-An Tsai, Angshuman Parashar, Joel S. Emer, Siddharth Joshi
2022MICROSparseloop: An Analytical Approach To Sparse Tensor Accelerator Modeling.Yannan Nellie Wu, Po-An Tsai, Angshuman Parashar, Vivienne Sze, Joel S. Emer
2021ASPLOSMind mappings: enabling efficient algorithm-accelerator mapping space search.Kartik Hegde, Po-An Tsai, Sitao Huang, Vikas Chandra, Angshuman Parashar, Christopher W. Fletcher
2021ISPASSSparseloop: An Analytical, Energy-Focused Design Space Exploration Methodology for Sparse Tensor Accelerators.Yannan Nellie Wu, Po-An Tsai, Angshuman Parashar, Vivienne Sze, Joel S. Emer
2020ASPLOSSafecracker: Leaking Secrets through Compressed Caches.Po-An Tsai, Andrs Snchez, Christopher W. Fletcher, Daniel Snchez
2019ASPLOSCompress Objects, Not Cache Lines: An Object-Based Compressed Memory Hierarchy.Po-An Tsai, Daniel Snchez
2018HPCAKPart: A Hybrid Cache Partitioning-Sharing Technique for Commodity Multicores.Nosayba El-Sayed, Anurag Mukkara, Po-An Tsai, Harshad Kasture, Xiaosong Ma, Daniel Snchez
2018MICROAdaptive Scheduling for Systems with Asymmetric Memory Hierarchies.Po-An Tsai, Changping Chen, Daniel Snchez
2018MICRORethinking the Memory Hierarchy for Modern Languages.Po-An Tsai, Yee Ling Gan, Daniel Snchez
2017ISCAJenga: Software-Defined Cache Hierarchies.Po-An Tsai, Nathan Beckmann, Daniel Snchez
2016HCIUncertainty and Mental Workload Among Wayfinding Strategies.Yi Chia Chien, Po-An Tsai, Yu Ting Lin, Ssu Min Wu, Kuan Ting Chen, Yu Ting Han, T. K. Philip Hwang
2015HPCAScaling distributed cache hierarchies through computation and data co-scheduling.Nathan Beckmann, Po-An Tsai, Daniel Snchez
2015IGARSSFeature space optimization of multispectral imagery and LiDAR waveform data.Yu-Ching Lin, Po-An Tsai, Chun-Lin Lin, Kuan-Tsung Chang, Ming-Da Tsai