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Pooneh Safayenikoo

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

3

Venues

3

Active years

2016–2026

Best venue rank

A*

Where they publish

Papers

3 indexed papers, newest first.

YearVenueTitleAuthors
2026HPDCCXLMemSim: Practical Performance Simulation and Characterization of CXL 3.0 Memory Systems.Yiwei Yang, Shri Vishakh Devanand, Brian Zhao, Yusheng Zheng, Pooneh Safayenikoo, Tanvir Ahmed Khan, Andi Quinn
2018ISCASNIZCache: Energy-efficient Non-uniform Cache Architecture for Chip-multiprocessors Based on Invalid and Zero Lines.Pooneh Safayenikoo, Arghavan Asad, Mahmood Fathy, Farah Mohammadi
2016MICROUCA: An Energy-efficient Hybrid Uncore Architecture in 3D Chip-Multiprocessors to minimize crosstalk.Pooneh Safayenikoo, Arghavan Asad, Kaamran Raahemifar, Mahmood Fathy