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Qidie Wu

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

3

Venues

3

Active years

2023–2026

Best venue rank

A*

Where they publish

Papers

3 indexed papers, newest first.

YearVenueTitleAuthors
2026DATEHetero-ChipletSim: Bridging Chiplet, Interconnect and Packaging Heterogeneity in Multi-Chiplet System Simulation.Xuguang Yuan, Jiangyuan Gu, Qidie Wu, Yang Hu, Shaojun Wei, Shouyi Yin
2025ICCADP2P-Chiplet: Partition and Placement Co-Optimization for Multi-Chiplet Architecture.Qidie Wu, Jiangyuan Gu, Xuguang Yuan, Shaojun Wei, Shouyi Yin
2023DACRMP-MEM: A HW/SW Reconfigurable Multi-Port Memory Architecture for Multi-PEA Oriented CGRA.Qidie Wu, Jiangyuan Gu, Youxu Lin, Boxiao Han, Hongjun He, Yang Hu, Leibo Liu, Shaojun Wei, Shouyi Yin