R. K. Kolagotla
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
1998–1998
Best venue rank
National
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 1998 | VLSID | VLSI Implementation of a 300-MHz 0.35 um CMOS 32-bit Auto-Reloadable Binary Synchronous Counter with Optimal Test Overhead Delay. | S. K. Misra, R. K. Kolagotla, Hosahalli R. Srinivas, J. C. Mo, Marc S. Diamondstein |