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Rajeswari Devadoss

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

3

Venues

2

Active years

2010–2019

Best venue rank

National

Where they publish

Papers

3 indexed papers, newest first.

YearVenueTitleAuthors
2019VLSIDMajority Logic: Prime Implicants and n-Input Majority Term Equivalence.Rajeswari Devadoss, Kolin Paul, M. Balakrishnan
2017DATEReVAMP: ReRAM based VLIW architecture for in-memory computing.Debjyoti Bhattacharjee, Rajeswari Devadoss, Anupam Chattopadhyay
2010VLSIDClocking-Based Coplanar Wire Crossing Scheme for QCA.Rajeswari Devadoss, Kolin Paul, M. Balakrishnan