Ramesh Garg
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2004–2004
Best venue rank
National
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2004 | VLSID | Design of Power Amplifiers at 2.4 GHz/900 MHz and Implementation of On-chip Linearization Technique in 0.18/0.25m CMOS. | Padmanava Sen, Vipul Garg, Ramesh Garg, Nirmal B. Chakrabarti |