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Ramon Bertran

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

16

Venues

9

Active years

2010–2023

Best venue rank

A*

Where they publish

Papers

16 indexed papers, newest first.

YearVenueTitleAuthors
2023DSNCharacterization and Exploration of Latch Checkers for Efficient RAS Protection.Karthik Swaminathan, Ramon Bertran, Doug Balazich, Alper Buyuktosunoglu, Arvind Haran, Sean M. Carey, Karl Anderson, Hans M. Jacobson, Matthias Pflanz, Pradip Bose
2022ISCAAI accelerator on IBM telum processor: industrial product.Cdric Lichtenau, Alper Buyuktosunoglu, Ramon Bertran, Peter Figuli, Christian Jacobi, Nikolaos Papandreou, Haris Pozidis, Anthony Saporito, Andrew Sica, Elpida Tzortzatos
2021DSNSERMiner : A Framework for Early-stage Reliability Estimation for IBM Processors.Karthik Swaminathan, Ramon Bertran, Hans M. Jacobson, Pradip Bose, Matthias Pflanz, Doug Balazich
2021ISCAEnergy Efficiency Boost in the AI-Infused POWER10 Processor.Brian W. Thompto, Dung Q. Nguyen, Jos E. Moreira, Ramon Bertran, Hans M. Jacobson, Richard J. Eickemeyer, Rahul M. Rao, Michael Goulet, Marcy Byers, Christopher J. Gonzalez, Karthik Swaminathan, Nagu R. Dhanwada, Silvia M. Mller, Andreas Wagner, Satish Kumar Sadasivam, Robert K. Montoye, William J. Starke, Christian G. Zoellin, Michael S. Floyd, Jeffrey Stuecheli, Nandhini Chandramoorthy, John-David Wellman, Alper Buyuktosunoglu, Matthias Pflanz, Balaram Sinharoy, Pradip Bose
2021ISPASSMicroGrad: A Centralized Framework for Workload Cloning and Stress Testing.Gokul Subramanian Ravi, Ramon Bertran, Pradip Bose, Mikko H. Lipasti
2020HPCAAsymmetric Resilience: Exploiting Task-Level Idempotency for Transient Error Recovery in Accelerator-Based Systems.Jingwen Leng, Alper Buyuktosunoglu, Ramon Bertran, Pradip Bose, Quan Chen, Minyi Guo, Vijay Janapa Reddi
2019DSNGeneration of Stressmarks for Early Stage Soft-Error Modeling.Karthik Swaminathan, Ramon Bertran, Hans M. Jacobson, Prabhakar Kudva, Pradip Bose
2017HPCABRAVO: Balanced Reliability-Aware Voltage Optimization.Karthik Swaminathan, Nandhini Chandramoorthy, Chen-Yong Cher, Ramon Bertran, Alper Buyuktosunoglu, Pradip Bose
2017ICCDVery Low Voltage (VLV) Design.Ramon Bertran, Pradip Bose, David M. Brooks, Jeff Burns, Alper Buyuktosunoglu, Nandhini Chandramoorthy, Eric Cheng, Martin Cochet, Schuyler Eldridge, Daniel J. Friedman, Hans M. Jacobson, Rajiv V. Joshi, Subhasish Mitra, Robert K. Montoye, Arun Paidimarri, Pritish Parida, Kevin Skadron, Mircea Stan, Karthik Swaminathan, Augusto Vega, Swagath Venkataramani, Christos Vezyrtzis, Gu-Yeon Wei, John-David Wellman, Matthew M. Ziegler
2017ICSlibPRISM: an intelligent adaptation of prefetch and SMT levels.Cristobal Ortega, Miquel Moret, Marc Casas, Ramon Bertran, Alper Buyuktosunoglu, Alexandre E. Eichenberger, Pradip Bose
2015MICROSafe limits on voltage reduction efficiency in GPUs: a direct measurement approach.Jingwen Leng, Alper Buyuktosunoglu, Ramon Bertran, Pradip Bose, Vijay Janapa Reddi
2014MICROVoltage Noise in Multi-Core Processors: Empirical Characterization and Optimization Opportunities.Ramon Bertran, Alper Buyuktosunoglu, Pradip Bose, Timothy J. Slegel, Gerard Salem, Sean M. Carey, Richard F. Rizzolo, Thomas Strach
2012MICROSystematic Energy Characterization of CMP/SMT Processor Systems via Automated Micro-Benchmarks.Ramon Bertran, Alper Buyuktosunoglu, Meeta Sharma Gupta, Marc Gonzlez, Pradip Bose
2012SIGMETRICSPOTRA: a framework for building power models for next generation multicore architectures.Ramon Bertran, Marc Gonzlez, Xavier Martorell, Nacho Navarro, Eduard Ayguad
2011HPDCDesign space exploration for aggressive core replication schemes in CMPs.Lluc Alvarez, Ramon Bertran, Marc Gonzlez, Xavier Martorell, Nacho Navarro, Eduard Ayguad
2010ICSDecomposable and responsive power models for multicore processors using performance counters.Ramon Bertran, Marc Gonzlez, Xavier Martorell, Nacho Navarro, Eduard Ayguad