Reto Zimmermann
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
3
Active years
1993–2009
Best venue rank
C
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2009 | ARITH | Datapath Synthesis for Standard-Cell Design. | Reto Zimmermann |
| 1999 | ARITH | Efficient VLSI Implementation of Modulo (2^n=B11) Addition and Multiplication. | Reto Zimmermann |
| 1997 | ICASSP | Hardware implementation of a systolic antenna array signal processor based on CORDIC arithmetic. | Bruno Haller, Matthias Streiff, Urs Fleisch, Reto Zimmermann |
| 1993 | ITC | VINCI: Secure Test of a VLSI High-Speed Encryption System. | Heinz Bonnenberg, Andreas Curiger, Norbert Felber, Hubert Kaeslin, Reto Zimmermann, Wolfgang Fichtner |