Robert B. Hitchcock Sr.
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
1
Active years
1969–1982
Best venue rank
A*
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 1982 | DAC | Timing Verification and the Timing Analysis program. | Robert B. Hitchcock Sr. |
| 1970 | DAC | Partitioning of logic graphs: A theoretical analysis of pin reduction. | Robert B. Hitchcock Sr. |
| 1969 | DAC | Cellular wiring and the cellular modeling technique. | Robert B. Hitchcock Sr. |