Robert S. Cohn
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
10
Venues
7
Active years
1996–2016
Best venue rank
A*
Where they publish
Papers
10 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2016 | ICS | Simulation and Analysis Engine for Scale-Out Workloads. | Nadav Chachmon, Daniel Richins, Robert S. Cohn, Magnus Christensson, Wenzhi Cui, Vijay Janapa Reddi |
| 2010 | ISPASS | Dynamic program analysis of Microsoft Windows applications. | Alex Skaletsky, Tevi Devor, Nadav Chachmon, Robert S. Cohn, Kim M. Hazelwood, Vladimir Vladimirov, Moshe Bach |
| 2006 | CGO | A Cross-Architectural Interface for Code Cache Manipulation. | Kim M. Hazelwood, Robert S. Cohn |
| 2005 | PLDI | Pin: building customized program analysis tools with dynamic instrumentation. | Chi-Keung Luk, Robert S. Cohn, Robert Muth, Harish Patil, Artur Klauser, P. Geoffrey Lowney, Steven Wallace, Vijay Janapa Reddi, Kim M. Hazelwood |
| 2004 | CGO | Ispike: A Post-link Optimizer for the IntelItaniumArchitecture. | Chi-Keung Luk, Robert Muth, Harish Patil, Robert S. Cohn, P. Geoffrey Lowney |
| 2004 | MICRO | Pinpointing Representative Portions of Large Intel Itanium Programs with Dynamic Instrumentation. | Harish Patil, Robert S. Cohn, Mark Charney, Rajiv Kapoor, Andrew Sun, Anand Karunanidhi |
| 2004 | WCAE | PIN: a binary instrumentation tool for computer architecture research and education. | Vijay Janapa Reddi, Alex Settle, Daniel A. Connors, Robert S. Cohn |
| 2002 | ICS | Profile-guided post-link stride prefetching. | Chi-Keung Luk, Robert Muth, Harish Patil, Richard Weiss, P. Geoffrey Lowney, Robert S. Cohn |
| 2001 | ISCA | Code layout optimizations for transaction processing workloads. | Alex Ramrez, Luiz Andr Barroso, Kourosh Gharachorloo, Robert S. Cohn, Josep Llus Larriba-Pey, P. Geoffrey Lowney, Mateo Valero |
| 1996 | MICRO | Hot Cold Optimization of Large Windows/NT Applications. | Robert S. Cohn, P. Geoffrey Lowney |