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Roland E. Wunderlich

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

5

Venues

5

Active years

2003–2006

Best venue rank

A*

Where they publish

Papers

5 indexed papers, newest first.

YearVenueTitleAuthors
2006ISPASSSimulation sampling with live-points.Thomas F. Wenisch, Roland E. Wunderlich, Babak Falsafi, James C. Hoe
2005SIGMETRICSTurboSMARTS: accurate microarchitecture simulation sampling in minutes.Thomas F. Wenisch, Roland E. Wunderlich, Babak Falsafi, James C. Hoe
2004FPGAIn-system FPGA prototyping of an itanium microarchitecture.Roland E. Wunderlich, James C. Hoe
2004ICCDIn-System FPGA Prototyping of an Itanium Microarchitecture.Roland E. Wunderlich, James C. Hoe
2003ISCASMARTS: Accelerating Microarchitecture Simulation via Rigorous Statistical Sampling.Roland E. Wunderlich, Thomas F. Wenisch, Babak Falsafi, James C. Hoe