Rongliang Fu
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
19
Venues
8
Active years
2023–2026
Best venue rank
A*
Where they publish
Papers
19 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2026 | ASPDAC | DCLOG: Don't Cares-based Logic Optimization using Pre-training Graph Neural Networks. | Rongliang Fu, Libo Shen, Ziyi Wang, Zhengxing Lei, Zixiao Wang, Junying Huang, Bei Yu, Tsung-Yi Ho |
| 2026 | ASPDAC | Partitioning-free 3D-IC Floorplanning. | Shuo Ren, Zhen Zhuang, Rongliang Fu, Leilei Jin, Libo Shen, Bei Yu, Tsung-Yi Ho |
| 2026 | DATE | eLogic: An E-Graph-based Logic Rewriting Framework for Majority-Inverter Graphs. | Rongliang Fu, Wei Xuan, Shuo Yin, Guangyu Hu, Chen Chen, Hongce Zhang, Bei Yu, Tsung-Yi Ho |
| 2026 | DATE | PCB-Migrator: Automated PCB PnR Migration. | Yaohui Han, Beichen Li, Rongliang Fu, Qunsong Ye, Zhiyuan Lu, Junchen Liu, Bei Yu, Tsung-Yi Ho, Tinghuan Chen |
| 2026 | FCCM | Chariot: Compiler-Aware Heterogeneous Graph Representation Learning for Automated HLS Optimization. | Yanlong Huang, Jierui Liu, Yuhan She, Rongliang Fu, Tsung-Yi Ho, Hong Yan, Ray C. C. Cheung |
| 2026 | ISCAS | RECALLS: Reinforcement Learning Enhanced Generative Model for Logic Synthesis Optimization. | Ran Zhang, Xinda Chen, Rongliang Fu, Chunyang He, Da Wang, Fei Wang, Tsung-Yi Ho, Junying Huang |
| 2025 | DAC | Late Breaking Results: Hybrid Logic Optimization with Predictive Self-Supervision. | Rongliang Fu, Ran Zhang, Ziyang Zheng, Zhengyuan Shi, Yuan Pu, Junying Huang, Qiang Xu, Tsung-Yi Ho |
| 2025 | DAC | SeDA: Secure and Efficient DNN Accelerators with Hardware/Software Synergy. | Wei Xuan, Zhongrui Wang, Lang Feng, Ning Lin, Zihao Xuan, Rongliang Fu, Tsung-Yi Ho, Yuzhong Jiao, Luhong Liang |
| 2025 | ICCAD | J2Place: A Multiphase Clocking-Oriented Length-Matching Placement for Rapid Single-Flux-Quantum Circuits. | Rongliang Fu, Minglei Zhou, Huilong Jiang, Junying Huang, Xiaochun Ye, Tsung-Yi Ho |
| 2025 | ICCAD | ChronoTE: Crosstalk-Aware Timing Estimation for Routing Optimization via Edge-Enhanced GNNs. | Leilei Jin, Rongliang Fu, Zhen Zhuang, Liang Xiao, Fangzhou Liu, Bei Yu, Tsung-Yi Ho |
| 2025 | ICS | JBSA: A Bit-Serial Accelerator for Deep Neural Networks Using Superconducting SFQ Logic. | Yang Su, Sheng Li, Huilong Jiang, Haofei Yin, Rongliang Fu, Junying Huang, Xiaochun Ye, Zhimin Zhang, Jie Ren, Xiaoping Gao, Tsung-Yi Ho, Dongrui Fan |
| 2024 | DAC | RCGP: An Automatic Synthesis Framework for Reversible Quantum-Flux-Parametron Logic Circuits based on Efficient Cartesian Genetic Programming. | Rongliang Fu, Robert Wille, Tsung-Yi Ho |
| 2024 | DATE | JPlace: A Clock-Aware Length-Matching Placement for Rapid Single-Flux-Quantum Circuits. | Siyan Chen, Rongliang Fu, Junying Huang, Zhimin Zhang, Xiaochun Ye, Tsung-Yi Ho, Dongrui Fan |
| 2024 | ICCAD | RABER: Reliability-Aware Bayesian-Optimization-based Control Layer Escape Routing for Flow-based Microfluidics. | Siyuan Liang, Rongliang Fu, Mengchu Li, Tsun-Ming Tseng, Ulf Schlichtmann, Tsung-Yi Ho |
| 2024 | ICPP | FlatDD: A High-Performance Quantum Circuit Simulator using Decision Diagram and Flat Array. | Shui Jiang, Rongliang Fu, Lukas Burgholzer, Robert Wille, Tsung-Yi Ho, Tsung-Wei Huang |
| 2023 | ASPDAC | A Global Optimization Algorithm for Buffer and Splitter Insertion in Adiabatic Quantum-Flux-Parametron Circuits. | Rongliang Fu, Mengmeng Wang, Yirong Kan, Nobuyuki Yoshikawa, Tsung-Yi Ho, Olivia Chen |
| 2023 | DATE | BOMIG: A Majority Logic Synthesis Framework for AQFP Logic. | Rongliang Fu, Junying Huang, Mengmeng Wang, Nobuyuki Yoshikawa, Bei Yu, Tsung-Yi Ho, Olivia Chen |
| 2023 | ICCAD | Exact Logic Synthesis for Reversible Quantum-Flux-Parametron Logic. | Rongliang Fu, Olivia Chen, Nobuyuki Yoshikawa, Tsung-Yi Ho |
| 2023 | ICCAD | DLPlace: A Delay-Line Clocking-Based Placement Framework for AQFP Circuits. | Rongliang Fu, Olivia Chen, Bei Yu, Nobuyuki Yoshikawa, Tsung-Yi Ho |