JPlace: A Clock-Aware Length-Matching Placement for Rapid Single-Flux-Quantum Circuits.
Siyan Chen, Rongliang Fu, Junying Huang, Zhimin Zhang, Xiaochun Ye, Tsung-Yi Ho, Dongrui Fan
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Siyan Chen, Rongliang Fu, Junying Huang, Zhimin Zhang, Xiaochun Ye, Tsung-Yi Ho, Dongrui Fan
Browse the full DATE paper archive.