S. Nagaraj
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
2
Active years
1992–2018
Best venue rank
C
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2018 | MEMOCODE | Model Order Reduction of Nonlinear Circuit using Proper Orthogonal Decomposition and Nonlinear Autoregressive with eXogenous input (NARX) Neural Network. | S. Nagaraj, D. Seshachalam, Sunil Hucharaddi |
| 1992 | VLSID | WCS - A CAD Solution for Worst Case Performance Analysis of Integrated Circuits. | S. Nagaraj, N. Padmini, N. S. Nagaraj, R. Ramesh, V. Sachidanand |