Samuel Riedel
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
10
Venues
5
Active years
2020–2025
Best venue rank
A*
Where they publish
Papers
10 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2025 | DAC | Fast End-to-End Simulation and Exploration of Many-RISCV-Core Baseband Transceivers for Software-Defined Radio-Access Networks. | Marco Bertuletti, Yichao Zhang, Mahdi Abdollahpour, Samuel Riedel, Alessandro Vanelli-Coralli, Luca Benini |
| 2024 | DATE | LRSCwait: Enabling Scalable and Efficient Synchronization in Manycore Systems Through Polling-Free and Retry-Free Operation. | Samuel Riedel, Marc Gantenbein, Alessandro Ottaviano, Torsten Hoefler, Luca Benini |
| 2024 | ISCAS | 3D Partitioning with Pipeline Optimization for Low-Latency Memory Access in Many-Core SoCs. | Sudipta Das, Samuel Riedel, Marco Bertuletti, Luca Benini, Moritz Brunion, Julien Ryckaert, James Myers, Dwaipayan Biswas, Dragomir Milojevic |
| 2023 | DATE | MemPool Meets Systolic: Flexible Systolic Computation in a Large Shared-Memory Processor Cluster. | Samuel Riedel, Gua Hao Khov, Sergio Mazzola, Matheus A. Cavalcante, Renzo Andri, Luca Benini |
| 2022 | DATE | MemPool-3D: Boosting Performance and Efficiency of Shared-L1 Memory Many-Core Clusters with 3D Integration. | Matheus A. Cavalcante, Anthony Agnesina, Samuel Riedel, Moritz Brunion, Alberto Garca-Ortiz, Dragomir Milojevic, Francky Catthoor, Sung Kyu Lim, Luca Benini |
| 2022 | ICCAD | Spatz: A Compact Vector Processing Unit for High-Performance and Energy-Efficient Shared-L1 Clusters. | Matheus A. Cavalcante, Domenic Wthrich, Matteo Perotti, Samuel Riedel, Luca Benini |
| 2022 | ISLPED | Hier-3D: A Hierarchical Physical Design Methodology for Face-to-Face-Bonded 3D ICs. | Anthony Agnesina, Moritz Brunion, Alberto Garca Ortiz, Francky Catthoor, Dragomir Milojevic, Manu Komalan, Matheus A. Cavalcante, Samuel Riedel, Luca Benini, Sung Kyu Lim |
| 2021 | DATE | MemPool: A Shared-L1 Memory Many-Core Cluster with a Low-Latency Interconnect. | Matheus A. Cavalcante, Samuel Riedel, Antonio Pullini, Luca Benini |
| 2021 | ICCAD | Banshee: A Fast LLVM-Based RISC-V Binary Translator. | Samuel Riedel, Fabian Schuiki, Paul Scheffler, Florian Zaruba, Luca Benini |
| 2020 | DAC | ATUNs: Modular and Scalable Support for Atomic Operations in a Shared Memory Multiprocessor. | Andreas Kurth, Samuel Riedel, Florian Zaruba, Torsten Hoefler, Luca Benini |