Sandeep Miryala
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
5
Venues
4
Active years
2012–2023
Best venue rank
A
Where they publish
Papers
5 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2023 | VLSID | An Energy-Efficient Multi-bit Current-based Analog Compute-In-Memory Architecture and design Methodology. | Dinesh Kushwaha, Ashish Joshi, Neha Gupta, Aditya Sharma, Sandeep Miryala, Rajiv V. Joshi, Sudeb Dasgupta, Anand Bulusu |
| 2022 | ISCAS | A 65nm Compute-In-Memory 7T SRAM Macro Supporting 4-bit Multiply and Accumulate Operation by Employing Charge Sharing. | Dinesh Kushwaha, Aditya Sharma, Neha Gupta, Ritik Raj, Ashish Joshi, Jwalant Mishra, Rajat Kohli, Sandeep Miryala, Rajiv V. Joshi, Sudeb Dasgupta, Anand Bulusu |
| 2014 | DSD | Ultra Low-Power Computation via Graphene-Based Adiabatic Logic Gates. | Sandeep Miryala, Andrea Calimera, Enrico Macii, Massimo Poncino |
| 2013 | DATE | A verilog-a model for reconfigurable logic gates based on graphene pn-junctions. | Sandeep Miryala, Mehrdad Montazeri, Andrea Calimera, Enrico Macii, Massimo Poncino |
| 2012 | DATE | IR-drop analysis of graphene-based power distribution networks. | Sandeep Miryala, Andrea Calimera, Enrico Macii, Massimo Poncino |