Sandipan Sinha
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
1
Active years
2021–2025
Best venue rank
National
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2025 | VLSID | An Innovative Solution to Improve Ultra Low Voltage Writability and Leakage in GPU SRAMs. | Deepesh Gujjar, Sanatkumar Upadhye, Sandipan Sinha, Taha Khursheed, Jigar Patel, Jaswinder Sidhu, Manish Trivedi, Sagar Abachi |
| 2024 | VLSID | A 3nm Ultra High-Speed (4.5GHz) SRAM Cache Design With Wide DVFS Range. | Sandipan Sinha, Manish Trivedi, Jaswinder Singh, Sriharsha Enjapuri, Deepesh Gujjar, Ramesh Halli, Girishankar Gurumurthy |
| 2021 | VLSID | A 5nm Wide Voltage Range Ultra High Density SRAM Design for L2/L3 Cache Applications. | Sriharsha Enjapuri, Deepesh Gujjar, Sandipan Sinha, Ramesh Halli, Manish Trivedi |