Sanjive Agarwala
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
6
Venues
3
Active years
1994–2012
Best venue rank
C
Where they publish
Papers
6 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2012 | VLSID | A 1.25GHz 0.8W C66x DSP Core in 40nm CMOS. | Raguram Damodaran, Timothy Anderson, Sanjive Agarwala, Rama Venkatasubramanian, Michael Gill, Dhileep Gopalakrishnan, Anthony M. Hill, Abhijeet Chachad, Dheera Balasubramanian, Naveen Bhoria, Jonathan Tran, Duc Bui, Mujibur Rahman, Shriram Moharil, Matthew Pierson, Steven Mullinnix, Hung Ong, David Thompson, Krishna Gurram, Oluleye Olorode, Nuruddin Mahmood, Jose Flores, Arjun Rajagopal, Soujanya Narnur, Daniel Wu, Alan Hales, Kyle Peavy, Robert Sussman |
| 2004 | VLSID | A 800 MHz System-on-Chip for Wireless Infrastructure Applications. | Sanjive Agarwala, Paul Wiley, Arjun Rajagopal, Anthony M. Hill, Raguram Damodaran, Lewis Nardini, Tim Anderson, Steven Mullinnix, Jose Flores, Heping Yue, Abhijeet Chachad, John Apostol, Kyle Castille, Usha Narasimha, Tod Wolf, N. S. Nagaraj, Manjeri Krishnan, Luong Nguyen, Todd Kroeger, Mike Gill, Peter Groves, Bill Webster, Joel Graber, Christine Karlovich |
| 2000 | ICCD | A Multi-Level Memory System Architecture for High-Performance DSP Applications. | Sanjive Agarwala, Charles Fuoco, Tim Anderson, Dave Comisky, Christopher Mobley |
| 2000 | ICCD | Effective Hardware-Based Two-Way Loop Cache for High Performance Low Power Processors. | Tim Anderson, Sanjive Agarwala |
| 2000 | ICCD | A Scalable High-Performance DMA Architecture for DSP Applications. | Dave Comisky, Sanjive Agarwala, Charles Fuoco |
| 1994 | ISCAS | A Linear Time Algorithm for Timing Directed Circuit Optimizations. | Sanjive Agarwala, Patrick W. Bosshart |