Seiyang Yang
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
7
Venues
5
Active years
1989–2014
Best venue rank
A*
Where they publish
Papers
7 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2014 | DATE | Predictive parallel event-driven HDL simulation with a new powerful prediction strategy. | Seiyang Yang, Jaehoon Han, Doowhan Kwak, Namdo Kim, Daeseo Cha, Junhyuck Park, Jay Kim |
| 2011 | DATE | Temporal parallel simulation: A fast gate-level HDL simulation using higher level models. | Dusung Kim, Maciej J. Ciesielski, Kyuho Shim, Seiyang Yang |
| 2011 | DATE | A new distributed event-driven gate-level HDL simulation by accurate prediction. | Dusung Kim, Maciej J. Ciesielski, Seiyang Yang |
| 2008 | ASPDAC | A fast two-pass HDL simulation with on-demand dump. | Kyuho Shim, Young-Rae Cho, Namdo Kim, Hyuncheol Baik, Kyungkuk Kim, Dusung Kim, Jaebum Kim, Byeongun Min, Kyumyung Choi, Maciej J. Ciesielski, Seiyang Yang |
| 2008 | VLSID | Simulation Acceleration with HW Re-Compilation Avoidance. | Kyuho Shim, Kesava R. Talupuru, Maciej J. Ciesielski, Seiyang Yang |
| 2004 | DAC | A new state assignment technique for testing and low power. | Sungju Park, Sangwook Cho, Seiyang Yang, Maciej J. Ciesielski |
| 1989 | ICCAD | PLA decomposition with generalized decoders. | Seiyang Yang, Maciej J. Ciesielski |