| 2020 | ISCAS | A Read Voltage Modulation Technique for Leakage Current Compensation in Cross-Point OTS-PRAM. | Kwang Woo Lee, Hyun Kook Park, Seong-Ook Jung |
| 2018 | ISCAS | SRAM Cell with Data-Aware Power-Gating Write-Asist for Near-Threshold Operation. | Tae Woo Oh, Seong-Ook Jung |
| 2016 | ISCAS | Area-optimal sensing circuit designs in deep submicrometer STT-RAM. | Sara Choi, Taehui Na, Seong-Ook Jung, Jung Pill Kim, Seung-Hyuk Kang |
| 2016 | ISCAS | WL under-driving scheme with decremental step voltage and incremental step time for high-capacity NAND flash memory. | Junyoung Ko, Younghwi Yang, Seong-Ook Jung, Jisu Kim, Cheon An Lee, Young-Sun Min, Jin-Young Chun, Moosung Kim |
| 2015 | ISLPED | Reference-circuit analysis for high-bandwidth spin transfer torque random access memory. | Byungkyu Song, Taehui Na, Seong-Ook Jung, Jung Pill Kim, Seung-Hyuk Kang |
| 2014 | ISCAS | High-performance low-power magnetic tunnel junction based non-volatile flip-flop. | Taehui Na, Kyungho Ryu, Jisu Kim, Seong-Ook Jung, Jung Pill Kim, Seung-Hyuk Kang |
| 2013 | ISCAS | A comparative study of STT-MTJ based non-volatile flip-flops. | Taehui Na, Kyungho Ryu, Jisu Kim, Seung-Hyuk Kang, Seong-Ook Jung |
| 2007 | ISLPED | Slope interconnect effort: gate-interconnect interdependentdelay model for CMOS logic gates. | Myeong-Eun Hwang, Seong-Ook Jung, Kaushik Roy |
| 2004 | ISCAS | A low-power 1.85 GHz 32-bit carry lookahead adder using Dual Path All-N-Logic. | Ge Yang, Seong-Ook Jung, Kwang-Hyun Baek, Soo Hwan Kim, Suki Kim, Sung-Mo Kang |
| 2002 | DAC | Low-swing clock domino logic incorporating dual supply and dual threshold voltages. | Seong-Ook Jung, Ki-Wook Kim, Sung-Mo Kang |
| 2002 | DATE | Dual Threshold Voltage Domino Logic Synthesis for High Performance with Noise and Power Constrain. | Seong-Ook Jung, Ki-Wook Kim, Sung-Mo Kang |
| 2001 | DAC | Coupling Delay Optimization by Temporal Decorrelation using Dual Threshold Voltage Technique. | Ki-Wook Kim, Seong-Ook Jung, Prashant Saxena, C. L. Liu, Sung-Mo Kang |
| 2001 | ISCAS | Noise constrained power optimization for dual VT domino logic. | Seong-Ook Jung, Ki-Wook Kim, Sung-Mo Kang |
| 2001 | ISCAS | Skew-tolerant high-speed (STHS) domino logic. | Seong-Ook Jung, Seung-Moon Yoo, Ki-Wook Kim, Sung-Mo Kang |
| 2001 | ISCAS | Coupling-aware minimum delay optimization for domino logic circuits. | Ki-Wook Kim, Seong-Ook Jung, Sung-Mo Kang |
| 2001 | ISCAS | Low cost and high efficiency BIST scheme with 2-level LFSR and ATPT. | Seung-Moon Yoo, Seong-Ook Jung, Sung-Mo Kang |
| 2001 | ISCAS | New current-mode sense amplifiers for high density DRAM and PIM architectures. | Seung-Moon Yoo, Chulwoo Kim, Seong-Ook Jung, Kwang-Hyun Baek, Sung-Mo Kang |
| 2000 | ISCAS | Parallel dynamic logic (PDL) with speed-enhanced skewed static (SSS) logic. | Chulwoo Kim, Seong-Ook Jung, Kwang-Hyun Baek, Sung-Mo Kang |
| 2000 | ISLPED | Noise-aware power optimization for on-chip interconnect. | Ki-Wook Kim, Seong-Ook Jung, Unni Narayanan, C. L. Liu, Sung-Mo Kang |