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Seonjin Na

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

9

Venues

4

Active years

2021–2025

Best venue rank

A*

Where they publish

Papers

9 indexed papers, newest first.

YearVenueTitleAuthors
2025HPCALet-Me-In: (Still) Employing In-pointer Bounds Metadata for Fine-grained GPU Memory Safety.Jaewon Lee, Euijun Chung, Saurabh Singh, Seonjin Na, Yonghae Kim, Jaekyu Lee, Hyesoon Kim
2025ISCAUnified Memory Protection with Multi-granular MAC and Integrity Tree for Heterogeneous Processors.Sunho Lee, Seonjin Na, Jeongwon Choi, Jinwon Pyo, Jaehyuk Huh
2025MICROSwift and Trustworthy Large-Scale GPU Simulation with Fine-Grained Error Modeling and Hierarchical Clustering.Euijun Chung, Seonjin Na, Sung Ha Kang, Hyesoon Kim
2024HPCASupporting Secure Multi-GPU Computing with Dynamic and Batched Metadata Management.Seonjin Na, Jungwoo Kim, Sunho Lee, Jaehyuk Huh
2024ISCABarre Chord: Efficient Virtual Memory Translation for Multi-Chip-Module GPUs.Yuan Feng, Seonjin Na, Hyesoon Kim, Hyeran Jeon
2023MICROImproving Data Reuse in NPU On-chip Memory with Interleaved Gradient Order for DNN Training.Jungwoo Kim, Seonjin Na, Sanghyeon Lee, Sunho Lee, Jaehyuk Huh
2022HPCATNPU: Supporting Trusted Execution with Tree-less Integrity Protection for Neural Processing Unit.Sunho Lee, Jungwoo Kim, Seonjin Na, Jongse Park, Jaehyuk Huh
2022ICCDTunable Memory Protection for Secure Neural Processing Units.Sunho Lee, Seonjin Na, Jungwoo Kim, Jongse Park, Jaehyuk Huh
2021HPCACommon Counters: Compressed Encryption Counters for Secure GPU Memory.Seonjin Na, Sunho Lee, Yeonjae Kim, Jongse Park, Jaehyuk Huh