Shengping Lv
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
2
Active years
2020–2026
Best venue rank
C
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2026 | ISCAS | A 40 μV VRipple, 0.1-ps FoM Output-Capacitor-Less Fully Time-Domain Digital LDO With a VCO-Assisted Dual Loop. | Guanzhe Hu, Shengping Lv, Yufei Song, Peng Zhang, Wen Jia, Fei Chen, Shuqiang Lu, Zhihua Wang, Hanjun Jiang |
| 2026 | ISCAS | A Low Noise Bio-potential AFE Achieving 300-mV EDO Tolerance and <20-ms-Settling with VCO-based Full Digital DC Servo Loop. | Shengping Lv, Guanzhe Hu, Liuxin Lv, Peng Zhang, Fei Chen, Wen Jia, Shuqiang Lu, Zhihua Wang, Hanjun Jiang |
| 2024 | ISCAS | A Capacitor-Less LDO Regulator Compensated by Adaptive Zero for Zero-Load Stability Enhancement. | Shengping Lv, Zhijie Chen, Peng Zhang, Peiyuan Wan, Liuxin Lv, Hanjun Jiang |
| 2020 | GLOBECOM | Establishing Secrecy Region for Directional Modulation Scheme with Random Frequency Diverse Array. | Shengping Lv, Jinsong Hu, Youjia Chen, Zhimeng Xu, Zhizhang (David) Chen |