| 2014 | ASPDAC | Routability-driven bump assignment for chip-package co-design. | Meng-Ling Chen, Tu-Hsiung Tsai, Hung-Ming Chen, Shi-Hao Chen |
| 2014 | DATE | Cost-effective decap selection for beyond die power integrity. | Yi-En Chen, Tu-Hsiung Tsai, Shi-Hao Chen, Hung-Ming Chen |
| 2013 | VTS | Testing retention flip-flops in power-gated designs. | Hao-Wen Hsu, Shih-Hua Kuo, Wen-Hsiang Chang, Shi-Hao Chen, Ming-Tung Chang, Mango Chia-Tso Chao |
| 2012 | ASPDAC | An Efficient Hamiltonian-cycle power-switch routing for MTCMOS designs. | Yi-Ming Wang, Shi-Hao Chen, Mango Chia-Tso Chao |
| 2012 | DATE | On effective flip-chip routing via pseudo single redistribution layer. | Hsin-Wu Hsu, Meng-Ling Chen, Hung-Ming Chen, Hung-Chun Li, Shi-Hao Chen |
| 2010 | ICCAD | Testing methods for detecting stuck-open power switches in coarse-grain MTCMOS designs. | Szu-Pang Mu, Yi-Ming Wang, Hao-Yu Yang, Mango Chia-Tso Chao, Shi-Hao Chen, Chih-Mou Tseng, Tsung-Ying Tsai |
| 2008 | ASPDAC | Experiences of low power design implementation and verification. | Shi-Hao Chen, Jiing-Yuan Lin |
| 2007 | ASPDAC | DFM/DFY practices during physical designs for timing, signal integrity, and power. | Shi-Hao Chen, Ke-Cheng Chu, Jiing-Yuan Lin, Cheng-Hong Tsai |