Shien Zhu
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
5
Venues
4
Active years
2020–2026
Best venue rank
A
Where they publish
Papers
5 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2026 | DATE | SSR: Sparse Segment Reduction for Ternary GEMM Acceleration. | Adeline Pittet, Shien Zhu, Valrie Verdan, Gustavo Alonso |
| 2025 | ISLPED | Faster Ternary and Binary Neural Network Inference on CPU by Reducing Popcount Overhead. | Olivier Fischer, Shien Zhu, Gustavo Alonso |
| 2023 | FPL | An Efficient Sparse LSTM Accelerator on Embedded FPGAs with Bandwidth-Oriented Pruning. | Shiqing Li, Shien Zhu, Xiangzhong Luo, Tao Luo, Weichen Liu |
| 2023 | ISLPED | iMAT: Energy-Efficient In-Memory Acceleration for Ternary Neural Networks With Sparse Dot Product. | Shien Zhu, Shuo Huai, Guochu Xiong, Weichen Liu |
| 2020 | ICPADS | XOR-Net: An Efficient Computation Pipeline for Binary Neural Network Inference on Edge Devices. | Shien Zhu, Luan H. K. Duong, Weichen Liu |