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Shiliang Hu

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

11

Venues

6

Active years

2004–2017

Best venue rank

A*

Where they publish

Papers

11 indexed papers, newest first.

YearVenueTitleAuthors
2017MICROTMI: thread memory isolation for false sharing repair.Christian DeLozier, Ariel Eizenberg, Shiliang Hu, Gilles Pokam, Joseph Devietti
2016HPCALASER: Light, Accurate Sharing dEtection and Repair.Liang Luo, Akshitha Sriraman, Brooke Fugate, Shiliang Hu, Gilles Pokam, Chris J. Newburn, Joseph Devietti
2016PLDIRemix: online detection and repair of cache contention for the JVM.Ariel Eizenberg, Shiliang Hu, Gilles Pokam, Joseph Devietti
2013ISCAQuickRec: prototyping an intel architecture extension for record and replay of multithreaded programs.Gilles Pokam, Klaus Danne, Cristiano Pereira, Rolf Kassa, Tim Kranich, Shiliang Hu, Justin Emile Gottschlich, Nima Honarmand, Nathan Dautenhahn, Samuel T. King, Josep Torrellas
2011CGOA HW/SW co-designed heterogeneous multi-core virtual machine for energy-efficient general purpose computing.Youfeng Wu, Shiliang Hu, Edson Borin, Cheng Wang
2011MICROCoreRacer: a practical memory race recorder for multicore x86 TSO processors.Gilles Pokam, Cristiano Pereira, Shiliang Hu, Ali-Reza Adl-Tabatabai, Justin Emile Gottschlich, Jungwoo Ha, Youfeng Wu
2010CGOTAO: two-level atomicity for dynamic binary optimizations.Edson Borin, Youfeng Wu, Cheng Wang, Wei Liu, Maurcio Breternitz Jr., Shiliang Hu, Esfir Natanzon, Shai Rotem, Roni Rosner
2009ICSDynamic parallelization of single-threaded binary programs using speculative slicing.Cheng Wang, Youfeng Wu, Edson Borin, Shiliang Hu, Wei Liu, Dave Sager, Tin-Fook Ngai, Jesse Fang
2006HPCAAn approach for implementing efficient superscalar CISC processors.Shiliang Hu, Ilhyun Kim, Mikko H. Lipasti, James E. Smith
2006ISCAReducing Startup Time in Co-Designed Virtual Machines.Shiliang Hu, James E. Smith
2004CGOUsing Dynamic Binary Translation to Fuse Dependent Instructions.Shiliang Hu, James E. Smith