Shiva Raja
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2008–2008
Best venue rank
A*
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2008 | DAC | Transistor level gate modeling for accurate and fast timing, noise, and power analysis. | Shiva Raja, F. Varadi, Murat R. Becer, Joao Geada |