Skip to content

Shoji Kawahara

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

4

Venues

2

Active years

2003–2005

Best venue rank

A*

Where they publish

Papers

4 indexed papers, newest first.

YearVenueTitleAuthors
2005MICROPinot: Speculative Multi-threading Processor Architecture Exploiting Parallelism over a Wide Range of Granularities.Taku Ohsawa, Masamichi Takagi, Shoji Kawahara, Satoshi Matsushita
2003PDPTAPerformance Evaluation of an On-Chip Multi-Threaded Processor with Cache Memory Managed by Logical Thread Number.Hironori Nakajo, Masanori Yamato, Shoji Kawahara, Norito Kato, Koichi Sasada, Mikiko Sato, Mitaro Namiki
2003PDPTAImplementation and Evaluation of a Thread Library for Multithreaded Architecture.Koichi Sasada, Mikiko Sato, Shoji Kawahara, Norito Kato, Masanori Yamato, Hironori Nakajo, Mitaro Namiki
2003PDPTAA Process and Thread Management of the Operating System "Future" for On Chip Multithreaded Architecture.Mikiko Sato, Koichi Sasada, Shoji Kawahara, Norito Kato, Masanori Yamato, Hironori Nakajo, Mitaro Namiki