Shota Ishihara
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
2
Active years
2009–2012
Best venue rank
B
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2012 | ISCAS | Dual-rail/single-rail hybrid logic design for high-performance asynchronous circuit. | Zhengfan Xia, Shota Ishihara, Masanori Hariyama, Michitaka Kameyama |
| 2011 | ASPDAC | An implementation of an asychronous FPGA based on LEDR/four-phase-dual-rail hybrid architecture. | Yoshiya Komatsu, Shota Ishihara, Masanori Hariyama, Michitaka Kameyama |
| 2009 | ASPDAC | A low-power FPGA based on autonomous fine-grain power-gating. | Shota Ishihara, Masanori Hariyama, Michitaka Kameyama |