Shrirang K. Karandikar
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
6
Venues
5
Active years
2001–2007
Best venue rank
A*
Where they publish
Papers
6 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2007 | ASPDAC | Fast Electrical Correction Using Resizing and Buffering. | Shrirang K. Karandikar, Charles J. Alpert, Mehmet Can Yildiz, Paul Villarrubia, Stephen T. Quay, T. Mahmud |
| 2006 | DAC | Fast algorithms for slew constrained minimum cost buffering. | Shiyan Hu, Charles J. Alpert, Jiang Hu, Shrirang K. Karandikar, Zhuo Li, Weiping Shi, Cliff C. N. Sze |
| 2005 | ISCAS | Fast estimation of area-delay trade-offs in circuit sizing. | Shrirang K. Karandikar, Sachin S. Sapatnekar |
| 2004 | DATE | Fast Comparisons of Circuit Implementations. | Shrirang K. Karandikar, Sachin S. Sapatnekar |
| 2004 | ICCAD | Logical effort based technology mapping. | Shrirang K. Karandikar, Sachin S. Sapatnekar |
| 2001 | DAC | Technology Mapping for SOI Domino Logic Incorporating Solutions for the Parasitic Bipolar Effect. | Shrirang K. Karandikar, Sachin S. Sapatnekar |