Shu-Hsuan Chou
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
5
Venues
3
Active years
2007–2011
Best venue rank
A*
Where they publish
Papers
5 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2011 | VTS | A Novel mechanism for speed characterization during delay test. | Amitava Majumdar, Arani Sinha, Nehal Patel, Ramamurthy Setty, Yan Dong, Shu-Hsuan Chou |
| 2010 | DATE | RunAssert: A non-intrusive run-time assertion for parallel programs debugging. | Chi-Neng Wen, Shu-Hsuan Chou, Tien-Fu Chen, Tay-Jyi Lin |
| 2009 | DAC | No cache-coherence: a single-cycle ring interconnection for multi-core L1-NUCA sharing on 3D chips. | Shu-Hsuan Chou, Chien-Chih Chen, Chi-Neng Wen, Yi-Chao Chan, Tien-Fu Chen, Chao-Ching Wang, Jinn-Shyan Wang |
| 2009 | DAC | NUDA: a non-uniform debugging architecture and non-intrusive race detection for many-core. | Chi-Neng Wen, Shu-Hsuan Chou, Tien-Fu Chen, Alan Peisheng Su |
| 2007 | DAC | An Embedded Coherent-Multithreading Multimedia Processor and Its Programming Model. | Jui-Chin Chu, Wei-Chun Ku, Shu-Hsuan Chou, Tien-Fu Chen, Jiun-In Guo |