Shuangchen Li

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

Venues

Active years

2012–2025

Best venue rank

Where they publish

Papers

41 indexed papers, newest first.

Year	Venue	Title	Authors
2025	ICCAD	HD-MoE: Hybrid and Dynamic Parallelism for Mixture-of-Expert LLMs with 3D Near-Memory Processing.	Haochen Huang, Shuzhang Zhong, Zhe Zhang, Shuangchen Li, Dimin Niu, Hongzhong Zheng, Runsheng Wang, Meng Li
2023	MICRO	TT-GNN: Efficient On-Chip Graph Neural Network Training via Embedding Reformation and Hardware Optimization.	Zheng Qu, Dimin Niu, Shuangchen Li, Hongzhong Zheng, Yuan Xie
2023	MICRO	DF-GAS: a Distributed FPGA-as-a-Service Architecture towards Billion-Scale Graph-based Approximate Nearest Neighbor Search.	Shulin Zeng, Zhenhua Zhu, Jun Liu, Haoyu Zhang, Guohao Dai, Zixuan Zhou, Shuangchen Li, Xuefei Ning, Yuan Xie, Huazhong Yang, Yu Wang
2022	ISCA	Hyperscale FPGA-as-a-service architecture for large-scale distributed graph neural network.	Shuangchen Li, Dimin Niu, Yuhao Wang, Wei Han, Zhe Zhang, Tianchan Guan, Yijin Guan, Heng Liu, Linyong Huang, Zhaoyang Du, Fei Xue, Yuanwei Fang, Hongzhong Zheng, Yuan Xie
2021	ICCAD	Overcoming the Memory Hierarchy Inefficiencies in Graph Processing Applications.	Jilan Lin, Shuangchen Li, Yufei Ding, Yuan Xie
2021	OSDI	GNNAdvisor: An Adaptive and Efficient Runtime System for GNN Acceleration on GPUs.	Yuke Wang, Boyuan Feng, Gushu Li, Shuangchen Li, Lei Deng, Yuan Xie, Yufei Ding
2020	ASPLOS	DeepSniffer: A DNN Model Extraction Framework Based on Learning Architectural Hints.	Xing Hu, Ling Liang, Shuangchen Li, Lei Deng, Pengfei Zuo, Yu Ji, Xinfeng Xie, Yufei Ding, Chang Liu, Timothy Sherwood, Yuan Xie
2020	HPCA	Fulcrum: A Simplified Control and Access Mechanism Toward Flexible and Practical In-Situ Accelerators.	Marzieh Lenjani, Patricia Gonzalez-Guerrero, Elaheh Sadredini, Shuangchen Li, Yuan Xie, Ameen Akel, Sean Eilert, Mircea R. Stan, Kevin Skadron
2020	ICCAD	fuseGNN: Accelerating Graph Convolutional Neural Network Training on GPGPU.	Zhaodong Chen, Mingyu Yan, Maohua Zhu, Lei Deng, Guoqi Li, Shuangchen Li, Yuan Xie
2020	ICCAD	NEST: DIMM based Near-Data-Processing Accelerator for K-mer Counting.	Wenqin Huangfu, Krishna T. Malladi, Shuangchen Li, Peng Gu, Yuan Xie
2020	ICML	Boosting Deep Neural Network Efficiency with Dual-Module Inference.	Liu Liu, Lei Deng, Zhaodong Chen, Yuke Wang, Shuangchen Li, Jingwei Zhang, Yihua Yang, Zhenyu Gu, Yufei Ding, Yuan Xie
2020	MICRO	DUET: Boosting Deep Neural Network Efficiency on Dual-Module Architecture.	Liu Liu, Zheng Qu, Lei Deng, Fengbin Tu, Shuangchen Li, Xing Hu, Zhenyu Gu, Yufei Ding, Yuan Xie
2019	ASPDAC	AERIS: area/energy-efficient 1T2R ReRAM based processing-in-memory neural network system-on-a-chip.	Jinshan Yue, Yongpan Liu, Fang Su, Shuangchen Li, Zhe Yuan, Zhibo Wang, Wenyu Sun, Xueqing Li, Huazhong Yang
2019	ASPLOS	FPSA: A Full System Stack Solution for Reconfigurable ReRAM-based NN Accelerator Architecture.	Yu Ji, Youyang Zhang, Xinfeng Xie, Shuangchen Li, Peiqi Wang, Xing Hu, Youhui Zhang, Yuan Xie
2019	DAC	Memory-Bound Proof-of-Work Acceleration for Blockchain Applications.	Kun Wu, Guohao Dai, Xing Hu, Shuangchen Li, Xinfeng Xie, Yu Wang, Yuan Xie
2019	DATE	Near-Data Acceleration of Privacy-Preserving Biomarker Search with 3D-Stacked Memory.	Alvin Oliver Glova, Itir Akgun, Shuangchen Li, Xing Hu, Yuan Xie
2019	DATE	Memory Trojan Attack on Neural Network Accelerators.	Yang Zhao, Xing Hu, Shuangchen Li, Jing Ye, Lei Deng, Yu Ji, Jianyu Xu, Dong Wu, Yuan Xie
2019	HPCA	Analysis and Optimization of the Memory Hierarchy for Graph Processing Workloads.	Abanti Basak, Shuangchen Li, Xing Hu, Sang Min Oh, Xinfeng Xie, Li Zhao, Xiaowei Jiang, Yuan Xie
2019	ISLPED	Balancing Memory Accesses for Energy-Efficient Graph Analytics Accelerators.	Mingyu Yan, Xing Hu, Shuangchen Li, Itir Akgun, Han Li, Xin Ma, Lei Deng, Xiaochun Ye, Zhimin Zhang, Dongrui Fan, Yuan Xie
2019	MICRO	MEDAL: Scalable DIMM based Near Data Processing Accelerator for DNA Seeding Algorithm.	Wenqin Huangfu, Xueqi Li, Shuangchen Li, Xing Hu, Peng Gu, Yuan Xie
2019	MICRO	Alleviating Irregularity in Graph Analytics Acceleration: a Hardware/Software Co-Design Approach.	Mingyu Yan, Xing Hu, Shuangchen Li, Abanti Basak, Han Li, Xin Ma, Itir Akgun, Yujing Feng, Peng Gu, Lei Deng, Xiaochun Ye, Zhimin Zhang, Dongrui Fan, Yuan Xie
2018	DAC	RADAR: a 3D-reRAM based DNA alignment accelerator architecture.	Wenqin Huangfu, Shuangchen Li, Xing Hu, Yuan Xie
2018	DATE	AIM: Fast and energy-efficient AES in-memory implementation for emerging non-volatile main memory.	Mimi Xie, Shuangchen Li, Alvin Oliver Glova, Jingtong Hu, Yuangang Wang, Yuan Xie
2018	MICRO	Persistence Parallelism Optimization: A Holistic Approach from Memory Bus to RDMA Network.	Xing Hu, Matheus Ogleari, Jishen Zhao, Shuangchen Li, Abanti Basak, Yuan Xie
2018	MICRO	SCOPE: A Stochastic Computing Engine for DRAM-Based In-Situ Accelerator.	Shuangchen Li, Alvin Oliver Glova, Xing Hu, Peng Gu, Dimin Niu, Krishna T. Malladi, Hongzhong Zheng, Bob Brennan, Yuan Xie
2017	ASPDAC	Building energy-efficient multi-level cell STT-RAM caches with data compression.	Liu Liu, Ping Chi, Shuangchen Li, Yuanqing Cheng, Yuan Xie
2017	MICRO	DRISA: a DRAM-based reconfigurable in-situ accelerator.	Shuangchen Li, Dimin Niu, Krishna T. Malladi, Hongzhong Zheng, Bob Brennan, Yuan Xie
2016	ASPDAC	Architecture design with STT-RAM: Opportunities and challenges.	Ping Chi, Shuangchen Li, Yuanqing Cheng, Yu Lu, Seung-Hyuk Kang, Yuan Xie
2016	DAC	Pinatubo: a processing-in-memory architecture for bulk bitwise operations in emerging non-volatile memories.	Shuangchen Li, Cong Xu, Qiaosha Zou, Jishen Zhao, Yu Lu, Yuan Xie
2016	ICCAD	NVSim-CAM: a circuit-level simulator for emerging nonvolatile memory based content-addressable memory.	Shuangchen Li, Liu Liu, Peng Gu, Cong Xu, Yuan Xie
2016	ISCA	PRIME: A Novel Processing-in-Memory Architecture for Neural Network Computation in ReRAM-Based Main Memory.	Ping Chi, Shuangchen Li, Cong Xu, Tao Zhang, Jishen Zhao, Yongpan Liu, Yu Wang, Yuan Xie
2016	MICRO	NEUTRAMS: Neural network transformation and co-design under neuromorphic hardware constraints.	Yu Ji, Youhui Zhang, Shuangchen Li, Ping Chi, Cihang Jiang, Peng Qu, Yuan Xie, Wenguang Chen
2015	ASPDAC	Nonvolatile memory allocation and hierarchy optimization for high-level synthesis.	Shuangchen Li, Ang Li, Yongpan Liu, Yuan Xie, Huazhong Yang
2015	DAC	Ambient energy harvesting nonvolatile processors: from circuit to system.	Yongpan Liu, Zewei Li, Hehe Li, Yiqun Wang, Xueqing Li, Kaisheng Ma, Shuangchen Li, Meng-Fan Chang, John Sampson, Yuan Xie, Jiwu Shu, Huazhong Yang
2015	HPCA	Architecture exploration for ambient energy harvesting nonvolatile processors.	Kaisheng Ma, Yang Zheng, Shuangchen Li, Karthik Swaminathan, Xueqing Li, Yongpan Liu, Jack Sampson, Yuan Xie, Vijaykrishnan Narayanan
2015	ISLPED	Leveraging emerging nonvolatile memory in high-level synthesis with loop transformations.	Shuangchen Li, Ang Li, Yuan Zhe, Yongpan Liu, Peng Li, Guangyu Sun, Yu Wang, Huazhong Yang, Yuan Xie
2014	ICCD	Intra-task scheduling for storage-less and converter-less solar-powered nonvolatile sensor nodes.	Daming Zhang, Shuangchen Li, Ang Li, Yongpan Liu, Xiaobo Sharon Hu, Huazhong Yang
2013	ASPDAC	Optimal partition with block-level parallelization in C-to-RTL synthesis for streaming applications.	Shuangchen Li, Yongpan Liu, Xiaobo Sharon Hu, Xinyu He, Yining Zhang, Pei Zhang, Huazhong Yang
2013	DATE	Utilizing voltage-frequency islands in C-to-RTL synthesis for streaming applications.	Xinyu He, Shuangchen Li, Yongpan Liu, Xiaobo Sharon Hu, Huazhong Yang
2012	ASPDAC	A hierarchical C2RTL framework for FIFO-connected stream applications.	Shuangchen Li, Yongpan Liu, Daming Zhang, Xinyu He, Pei Zhang, Huazhong Yang
2012	DATE	A compression-based area-efficient recovery architecture for nonvolatile processors.	Yiqun Wang, Yongpan Liu, Yumeng Liu, Daming Zhang, Shuangchen Li, Baiko Sai, Mei-Fang Chiang, Huazhong Yang