Shuangnan Liu
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
2
Active years
2017–2019
Best venue rank
A*
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2019 | DAC | Accelerating FPGA Prototyping through Predictive Model-Based HLS Design Space Exploration. | Shuangnan Liu, Francis C. M. Lau, Benjamin Carrin Schfer |
| 2017 | FPL | Learning-based interconnect-aware dataflow accelerator optimization. | Shuangnan Liu, Benjamin Carrin Schfer |