Shubin Liu
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
12
Venues
2
Active years
2014–2026
Best venue rank
C
Where they publish
Papers
12 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2026 | ISCAS | A Single-Ended Tri-Mode PAM2/3/4 Transceiver Front-End Achieving 0.437/0.302/0.314 pJ/bit Energy Efficiency for D2D Interconnection. | Hao Chang, Huajin Sun, Chenxi Han, Zhanming Gao, Yilong Dong, Yuhao Zhang, Lin Wang, Xiaoteng Zhao, Shubin Liu, Zhangming Zhu |
| 2026 | ISCAS | A PN-Assisted Dynamic-Window Interstage Gain Calibration for Pipeline-SAR ADCs. | Li Dang, Chengyuan Liu, Yue Cao, Hongzhi Liang, Ruixue Ding, Shubin Liu, Zhangming Zhu |
| 2026 | ISCAS | A 1GS/s 8b 2 Time-Interleaved SAR ADC with Speed-Enhanced Techniques in 65nm CMOS. | Li Dang, Yaoxin Zhang, Yuanzhe Li, Hongzhi Liang, Ruixue Ding, Shubin Liu, Zhangming Zhu |
| 2026 | ISCAS | A 15-Bit 22-μW 3.91-aF Power/Measurement-Time Scalable Direct Capacitance-to-Digital Converter with Closed-Loop Ratio-Based Floating Inverter Dynamic Amplifier. | Ruixue Ding, Bo Zhao, Yuke Shen, Jiahe Li, Tao Chen, Yuanhao Zhao, Jiuhuan Feng, Yi Shen, Shubin Liu, Zhangming Zhu |
| 2026 | ISCAS | A 0.07-mm | Zhicheng Dong, Huajin Sun, Xiaoteng Zhao, Yuxing Qi, Zekai Yang, Xianting Su, Rong Zhou, Bowen Wang, Ruixue Ding, Shubin Liu, Zhangming Zhu |
| 2026 | ISCAS | A 91.4-dB SNDR 200-kSPS Exponential-Incremental ADC with an Open-Loop Ratio-Based Floating Inverter Dynamic Amplifier. | Jiuhuan Feng, Yuke Shen, Bo Zhao, Yuanhao Zhao, Tao Chen, Yi Shen, Shubin Liu, Ruixue Ding, Zhangming Zhu |
| 2026 | ISCAS | A 112Gb/s DAC-Based PAM-4 Transmitter with Fast Automatic Retiming Clock Phase Optimization and 6-Tap FFE in 28nm CMOS. | Chenxi Han, Huajin Sun, Xiaoteng Zhao, Qi Zhang, Yuan Liu, Yuhao Zhang, Hongzhi Liang, Shubin Liu, Zhangming Zhu |
| 2026 | ISCAS | A 64GS/s 8b 64 Time-Interleaved SAR ADC Achieving 33.8dB SNDR at 26GHz in 28nm CMOS. | Yixiao Luo, Jiacheng Wang, Jun Chang, Hongzhi Liang, Li Dang, Ruixue Ding, Shubin Liu, Zhangming Zhu |
| 2026 | ISCAS | An 18-bit 97.2-μW 40-kSPS Single-Rate Scalable Switched-Capacitor Zoom ADC With Intrinsic DAC Mismatch Immunity and Tri-Level CDAC. | Yuke Shen, Bo Zhao, Jun Xiao, Deao Wu, Yuanhao Zhao, Yanbo Zhang, Yi Shen, Shubin Liu, Ruixue Ding, Zhangming Zhu |
| 2024 | ISCAS | A 30.5-to-31 GHz Sampling PLL With Double-Edge Sampling PD and Implict Common-Mode VCO Scoring 39.69-fs RMS Jitter and -253.6-dB FoM in a 0.047mm | Zhicheng Dong, Xiaoteng Zhao, Weitan Huang, Yuan Gao, Depeng Sun, Shubin Liu, Lihong Yang, Zhangming Zhu |
| 2024 | ISCAS | Low-Cost Linearity Testing of High-Resolution ADCs Using Segmentation Modeling and Partial Polynomial Fitting. | Dengquan Li, Yexin Zhu, Longsheng Wang, Shubin Liu, Zhangming Zhu |
| 2014 | FCCM | A Multi-phase Clock Time-to-Digital Convertor Based on ISERDES Architecture. | Tian Xiang, Lei Zhao, Xi Jin, Tianqi Wang, Shaoping Chu, Cong Ma, Shubin Liu, Qi An, Xue Ben |