| 2025 | ICLR | Dataset Distillation via Knowledge Distillation: Towards Efficient Self-Supervised Pre-training of Deep Networks. | Siddharth Joshi, Jiayi Ni, Baharan Mirzasoleiman |
| 2025 | ISCAS | Hadamard-Walsh Channelized Receivers: Theory, Implementation, and Applications. | Adyant Balaji, Zhaoyi Liu, Siddharth Joshi, Gert Cauwenberghs |
| 2025 | ISCAS | CAMEL: Capacitive Analog In-Memory Equalization for RF Signal Processing. | Md. Shahrul Islam, Kshama Lakshmi Ranganatha, Richard Dorrance, Siddharth Joshi |
| 2025 | ISCAS | SRAM-Based Ring Oscillators as Nonlinear Compute-in-Memory for Low-Power Communication. | Kshama Lakshmi Ranganatha, Md. Shahrul Islam, Sudipto Chakraborty, Siddharth Joshi |
| 2024 | AISTATS | Data-Efficient Contrastive Language-Image Pretraining: Prioritizing Data Quality over Quantity. | Siddharth Joshi, Arnav Jain, Ali Payani, Baharan Mirzasoleiman |
| 2024 | ICLR | Investigating the Benefits of Projection Head for Representation Learning. | Yihao Xue, Eric Gan, Jiayi Ni, Siddharth Joshi, Baharan Mirzasoleiman |
| 2024 | ICLR | Understanding the Robustness of Multi-modal Contrastive Learning to Distribution Shift. | Yihao Xue, Siddharth Joshi, Dang Nguyen, Baharan Mirzasoleiman |
| 2024 | WACV | Edge Inference with Fully Differentiable Quantized Mixed Precision Neural Networks. | Clemens J. S. Schaefer, Siddharth Joshi, Shan Li, Ral Blzquez |
| 2023 | ICML | Data-Efficient Contrastive Self-supervised Learning: Most Beneficial Examples for Supervised Learning Contribute the Least. | Siddharth Joshi, Baharan Mirzasoleiman |
| 2023 | ICML | Which Features are Learnt by Contrastive Learning? On the Role of Simplicity Bias in Class Collapse and Feature Suppression. | Yihao Xue, Siddharth Joshi, Eric Gan, Pin-Yu Chen, Baharan Mirzasoleiman |
| 2022 | ISPASS | Ruby: Improving Hardware Efficiency for Tensor Algebra Accelerators Through Imperfect Factorization. | Mark Horeni, Pooria Taheri, Po-An Tsai, Angshuman Parashar, Joel S. Emer, Siddharth Joshi |
| 2021 | ISCAS | Graph Coloring Using Coupled Oscillator-Based Dynamical Systems. | Antik Mallick, Mohammad Khairul Bashar, Daniel S. Truesdell, Benton H. Calhoun, Siddharth Joshi, Nikhil Shukla |
| 2021 | ISCAS | LSTMs for Keyword Spotting with ReRAM-Based Compute-In-Memory Architectures. | Clemens J. S. Schaefer, Mark Horeni, Pooria Taheri, Siddharth Joshi |
| 2020 | DAC | A Device Non-Ideality Resilient Approach for Mapping Neural Networks to Crossbar Arrays. | Arman Kazemi, Cristobal Alessandri, Alan C. Seabaugh, Xiaobo Sharon Hu, Michael T. Niemier, Siddharth Joshi |
| 2020 | ISCAS | A 4.2-pJ/Conv 10-b Asynchronous ADC with Hybrid Two-Tier Level-Crossing Event Coding. | Rajkumar Kubendran, Jongkil Park, Ritvik Sharma, Chul Kim, Siddharth Joshi, Gert Cauwenberghs, Sohmyung Ha |
| 2020 | ISCAS | Memory Organization for Energy-Efficient Learning and Inference in Digital Neuromorphic Accelerators. | Clemens J. S. Schaefer, Patrick Faley, Emre O. Neftci, Siddharth Joshi |
| 2020 | IECON | Neural Network based MPPT system for Standalone PV system. | Nikhil Pindi, Siddharth Joshi, Bhinal Mehta |
| 2020 | ISLPED | Embedding error correction into crossbars for reliable matrix vector multiplication using emerging devices. | Qiuwen Lou, Tianqi Gao, Patrick Faley, Michael T. Niemier, Xiaobo Sharon Hu, Siddharth Joshi |
| 2017 | ACSSC | Neuromorphic event-driven multi-scale synaptic connectivity and plasticity. | Siddharth Joshi, Bruno U. Pedroni, Gert Cauwenberghs |
| 2017 | DATE | Memristor for computing: Myth or reality? | Said Hamdioui, Shahar Kvatinsky, Gert Cauwenberghs, Lei Xie, Nimrod Wald, Siddharth Joshi, Hesham Mostafa Elsayed, Henk Corporaal, Koen Bertels |
| 2016 | ISCAS | A 6μW/MHz charge buffer with 7fF input capacitance in 65nm CMOS for non-contact electropotential sensing. | Siddharth Joshi, Chul Kim, Gert Cauwenberghs |
| 2012 | ISCAS | Live demonstration: Hierarchical Address-Event Routing architecture for reconfigurable large scale neuromorphic systems. | Jongkil Park, Theodore Yu, Christoph Maier, Siddharth Joshi, Gert Cauwenberghs |
| 2009 | VLSID | FPGA Based High Performance Double-Precision Matrix Multiplication. | Vinay B. Y. Kumar, Siddharth Joshi, Sachin B. Patkar, H. Narayanan |