Simone Casale Brunet
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
16
Venues
6
Active years
2013–2019
Best venue rank
National
Where they publish
Papers
16 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2019 | ICASSP | An Heterogeneous Compiler of Dataflow Programs for Zynq Platforms. | Endri Bezati, Simone Casale Brunet, Romuald Mosqueron, Marco Mattavelli |
| 2018 | FPL | Towards in the Field Fast Pathogens Detection Using FPGAs. | Simone Casale Brunet, Thierry Schpbach, Nicolas Guex, Christian Iseli, Alan J. Bridge, Dmitry Kuznetsov, Christian J. A. Sigrist, Phillippe Lemercier, Ioannis Xenarios, Endri Bezati |
| 2017 | ACSSC | Execution trace graph based interface synthesis of signal processing dataflow programs for heterogeneous MPSoCs. | Endri Bezati, Simone Casale Brunet, Marco Mattavelli |
| 2017 | ACSSC | Profiling of dynamic dataflow programs on MPSoC multi-core architectures. | Simone Casale Brunet, Endri Bezati, Aurelien Bloch, Marco Mattavelli |
| 2017 | ICASSP | High level synthesis of Smith-Waterman dataflow implementations. | Simone Casale Brunet, Endri Bezati, Marco Mattavelli |
| 2016 | ACSSC | High-level system synthesis and optimization of dataflow programs for MPSoCs. | Endri Bezati, Simone Casale Brunet, Marco Mattavelli, Jrn W. Janneck |
| 2016 | ACSSC | Trace-based manycore partitioning of stream-processing applications. | Malgorzata Michalska, Simone Casale Brunet, Endri Bezati, Marco Mattavelli, Jrn W. Janneck |
| 2016 | ICCS | A Partition Scheduler Model for Dynamic Dataflow Programs. | Malgorzata Michalska, Endri Bezati, Simone Casale Brunet, Marco Mattavelli |
| 2015 | ICCS | Execution Trace Graph Based Multi-criteria Partitioning of Stream Programs. | Malgorzata Michalska, Simone Casale Brunet, Endri Bezati, Marco Mattavelli |
| 2014 | ACSSC | Dataflow machines. | Jrn W. Janneck, Gustav Cedersj, Endri Bezati, Simone Casale Brunet |
| 2014 | ICASSP | A methodology for optimizing buffer sizes of dynamic dataflow fpgas implementations. | Ab Al-Hadi Ab Rahman, Simone Casale Brunet, Claudio Alberti, Marco Mattavelli |
| 2014 | ICIP | Exploring MPEG HEVC decoder parallelism for the efficient porting onto many-core platforms. | Damien de Saint Jorre, Claudio Alberti, Marco Mattavelli, Simone Casale Brunet |
| 2013 | ACSSC | Multi-clock domain optimization for reconfigurable architectures in high-level dataflow applications. | Simone Casale Brunet, Endri Bezati, Claudio Alberti, Marco Mattavelli, Edoardo Amaldi, Jrn W. Janneck |
| 2013 | ACSSC | Systems design space exploration by serial dataflow program execution. | Simone Casale Brunet, Marco Mattavelli, Claudio Alberti, Jrn W. Janneck |
| 2013 | ISCAS | TURNUS: A design exploration framework for dataflow system design. | Simone Casale Brunet, Marco Mattavelli, Jrn W. Janneck |
| 2013 | ISCAS | Buffer optimization based on critical path analysis of a dataflow program design. | Simone Casale Brunet, Marco Mattavelli, Jrn W. Janneck |