Slawomir Cichon
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
2
Active years
2005–2017
Best venue rank
C
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2017 | FedCSIS | H.265 Inverse Transform FPGA implementation in Impulse C. | Slawomir Cichon, Marek Gorgon |
| 2005 | FPL | Real-time Handel-C Based Implementation of DV Decoder. | Marek Gorgon, Slawomir Cichon, Miroslaw Pac |