Sreejeesh S. G.
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2019–2019
Best venue rank
National
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2019 | VLSID | Design and Physical Implementation of Array Signal Processor ASIC for Sector Imaging Systems. | Jayaraj U. Kidav, N. M. Sivamangai, Perumal M. Pillai, Sreejeesh S. G. |