Srinath Chavali
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2001–2001
Best venue rank
National
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2001 | VLSID | Average Power in Digital CMOS Circuits using Least Square Estimation. | Ashok K. Murugavel, N. Ranganathan, Ramamurti Chandramouli, Srinath Chavali |