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Sriram Vajapeyam

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

11

Venues

6

Active years

1987–2000

Best venue rank

A*

Where they publish

Papers

11 indexed papers, newest first.

YearVenueTitleAuthors
2000ICPPNon-Strict Cache Coherence: Exploiting Data-Race Tolerance in Emerging Applications.Siddhartha V. Tambat, Sriram Vajapeyam
1999HiPCWhither Indian Computer Science R & D?Sriram Vajapeyam
1999ISCADynamic Vectorization: A Mechanism for Exploiting Far-Flung ILP in Ordinary Programs.Sriram Vajapeyam, P. J. Joseph, Tulika Mitra
1998ISCAInstruction Issue Logic for High-Performance, Interruptable Pipelined Processors.Gurindar S. Sohi, Sriram Vajapeyam
1997ISCAImproving Superscalar Instruction Dispatch and Issue by Exploiting Dynamic Code Sequences.Sriram Vajapeyam, Tulika Mitra
1996HiPCProgram-level control of network delay for parallel asynchronous iterative applications.P. J. Joseph, Sriram Vajapeyam
1992MICROOn the instruction-level characteristics of scalar code in highly-vectorized scientific applications.Sriram Vajapeyam, Wei-Chung Hsu
1991ISCAAn Empirical Study of the CRAY Y-MP Processor Using the Perfect Club Benchmarks.Sriram Vajapeyam, Gurindar S. Sohi, Wei-Chung Hsu
1990ICCDExploitation of operation-level parallelism in a processor of the CRAY X-MP.Sriram Vajapeyam, Gurindar S. Sohi, Wei-Chung Hsu
1989ASPLOSTradeoffs in Instruction Format Design for Horizontal Architectures.Gurindar S. Sohi, Sriram Vajapeyam
1987ISCAInstruction Issue Logic for High-Performance, Interruptable Pipelined Processors.Gurindar S. Sohi, Sriram Vajapeyam