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Steven J. Koester

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

5

Venues

4

Active years

2007–2025

Best venue rank

A*

Where they publish

Papers

5 indexed papers, newest first.

YearVenueTitleAuthors
2025ASPDACTheoretical Optimal Specifications of Memcapacitors for Charge-Based In-Memory Computing.Zichen Qian, Rentao Wan, Chin-Hsiang Liao, Steven J. Koester, Mingoo Seok
2017DACA Pathway to Enable Exponential Scaling for the Beyond-CMOS Era: Invited.Jianping Wang, Sachin S. Sapatnekar, Chris H. Kim, Paul A. Crowell, Steven J. Koester, Supriyo Datta, Kaushik Roy, Anand Raghunathan, Xiaobo Sharon Hu, Michael T. Niemier, Azad Naeemi, Chia-Ling Chien, Caroline A. Ross, Roland Kawakami
2014VLSIDLeakage Modeling for Devices with Steep Sub-threshold Slope Considering Random Threshold Variations.Ayan Paul, Chaitanya Kshirsagar, Sachin S. Sapatnekar, Steven J. Koester, Chris H. Kim
2009ISLPEDLow power circuit design based on heterojunction tunneling transistors (HETTs).Daeyeon Kim, Yoonmyung Lee, Jin Cai, Isaac Lauer, Leland Chang, Steven J. Koester, Dennis Sylvester, David T. Blaauw
2007DACInterconnects in the Third Dimension: Design Challenges for 3D ICs.Kerry Bernstein, Paul S. Andry, Jerome Cann, Philip G. Emma, David Greenberg, Wilfried Haensch, Mike Ignatowski, Steven J. Koester, John Magerlein, Ruchir Puri, Albert M. Young