Subramanian Poothamkurissi Swaminathan
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2012–2012
Best venue rank
C
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2012 | ICCD | Timing aware partitioning for multi-FPGA based logic simulation using top-down selective hierarchy flattening. | Subramanian Poothamkurissi Swaminathan, Pey-Chang Kent Lin, Sunil P. Khatri |