Subramanian S. Iyer
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
5
Venues
3
Active years
2008–2023
Best venue rank
A*
Where they publish
Papers
5 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2023 | DAC | Hybrid Obfuscation of Chiplet-Based Systems. | Yousef Safari, Pooya Aghanoury, Subramanian S. Iyer, Nader Sehatbakhsh, Boris Vaisband |
| 2021 | DAC | Designing a 2048-Chiplet, 14336-Core Waferscale Processor. | Saptadeep Pal, Jingyang Liu, Irina Alam, Nicholas Cebry, Haris Suhail, Shi Bu, Subramanian S. Iyer, Sudhakar Pamarti, Rakesh Kumar, Puneet Gupta |
| 2019 | HPCA | Architecting Waferscale Processors - A GPU Case Study. | Saptadeep Pal, Daniel Petrisko, Matthew Tomei, Puneet Gupta, Subramanian S. Iyer, Rakesh Kumar |
| 2018 | HPCA | A Case for Packageless Processors. | Saptadeep Pal, Daniel Petrisko, Adeel Ahmad Bajwa, Puneet Gupta, Subramanian S. Iyer, Rakesh Kumar |
| 2008 | ITC | Analysis of Retention Time Distribution of Embedded DRAM - A New Method to Characterize Across-Chip Threshold Voltage Variation. | Wei Kong, Paul C. Parries, G. Wang, Subramanian S. Iyer |