T. Gokulan
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2020–2020
Best venue rank
C
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2020 | DSD | Design of a 32-bit, dual pipeline superscalar RISC-V processor on FPGA. | T. Gokulan, Akshay Muraleedharan, Kuruvilla Varghese |