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T. N. Vijaykumar

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

71

Venues

19

Active years

1994–2026

Best venue rank

A*

Where they publish

Papers

71 indexed papers, newest first.

YearVenueTitleAuthors
2026ISCAQED: Scalable Consistency Verification of Memory Instruction Reordering in Hardware.Gokulan Ravi, Xiaokang Qiu, Mithuna Thottethodi, T. N. Vijaykumar
2025SCBLAZE: Exploiting Hybrid Parallelism and Size-customized Kernels to Accelerate BLASTP on GPUs.Sree Charan Gundabolu, Mithuna Thottethodi, T. N. Vijaykumar
2023MICROEureka: Efficient Tensor Cores for One-sided Unstructured Sparsity in DNN Inference.Ashish Gondimalla, Mithuna Thottethodi, T. N. Vijaykumar
2021SCFastZ: accelerating gapped whole genome alignment on GPUs.Sree Charan Gundabolu, T. N. Vijaykumar, Mithuna Thottethodi
2020CGOSecure automatic bounds checking: prevention is simpler than cure.Ejebagom John Ojogbo, Mithuna Thottethodi, T. N. Vijaykumar
2020MICRONewton: A DRAM-maker's Accelerator-in-Memory (AiM) Architecture for Machine Learning.Mingxuan He, Choungki Song, Ilkon Kim, Chunseok Jeong, Seho Kim, Il Park, Mithuna Thottethodi, T. N. Vijaykumar
2019MICROSparTen: A Sparse Tensor Accelerator for Convolutional Neural Networks.Ashish Gondimalla, Noah Chesnut, Mithuna Thottethodi, T. N. Vijaykumar
2018SIGCOMMFast Congestion Control in RDMA-based Datacenter Networks.Jaichen Xue, Muhammad Usama Chaudhry, Balajee Vamanan, T. N. Vijaykumar, Mithuna Thottethodi
2017COMSNETSHydra: Leveraging functional slicing for efficient distributed SDN controllers.Yiyang Chang, Ashkan Rezaei, Balajee Vamanan, Jahangir Hasan, Sanjay G. Rao, T. N. Vijaykumar
2017COMSNETSExploring Functional Slicing in the Design of Distributed SDN Controllers.Yiyang Chang, Ashkan Rezaei, Balajee Vamanan, Jahangir Hasan, Sanjay G. Rao, T. N. Vijaykumar
2017MOBICOMNutShell: Scalable Whittled Proxy Execution for Low-Latency Web over Cellular Networks.Ashiwan Sivakumar, Chuan Jiang, Yun Seong Nam, Shankaranarayanan Puzhavakath Narayanan, Vijay Gopalakrishnan, Sanjay G. Rao, Subhabrata Sen, Mithuna Thottethodi, T. N. Vijaykumar
2015ISCAFaultHound: value-locality-based soft-fault tolerance.Nitin, Irith Pomeranz, T. N. Vijaykumar
2015MICROTimeTrader: exploiting latency tail to save datacenter energy for online search.Balajee Vamanan, Hamza Bin Sohail, Jahangir Hasan, T. N. Vijaykumar
2014ASPLOSHigh-performance fractal coherence.Gwendolyn Voskuilen, T. N. Vijaykumar
2014ISCAFractal++: Closing the performance gap between fractal and conventional coherence.Gwendolyn Voskuilen, T. N. Vijaykumar
2014USENIXShuffleWatcher: Shuffle-aware Scheduling in Multi-tenant MapReduce Clusters.Faraz Ahmad, Srimat T. Chakradhar, Anand Raghunathan, T. N. Vijaykumar
2013ASPLOSWait-n-GoTM: improving HTM performance by serializing cyclic dependencies.Syed Ali Raza Jafri, Gwendolyn Voskuilen, T. N. Vijaykumar
2012ASPLOSTarazu: optimizing MapReduce on heterogeneous clusters.Faraz Ahmad, Srimat T. Chakradhar, Anand Raghunathan, T. N. Vijaykumar
2012SIGCOMMDeadline-aware datacenter tcp (D2TCP).Balajee Vamanan, Jahangir Hasan, T. N. Vijaykumar
2011CoNEXTTreeCAM: decoupling updates and lookups in packet classification.Balajee Vamanan, T. N. Vijaykumar
2010ASPLOSJoint optimization of idle and cooling power in data centers while maintaining response time.Faraz Ahmad, T. N. Vijaykumar
2010HPCALiteTM: Reducing transactional state overhead.Syed Ali Raza Jafri, Mithuna Thottethodi, T. N. Vijaykumar
2010ISCATimetraveler: exploiting acyclic races for optimizing memory race recording.Gwendolyn Voskuilen, Faraz Ahmad, T. N. Vijaykumar
2010MICROAdaptive Flow Control for Robust Performance and Energy.Syed Ali Raza Jafri, Yu-Ju Hong, Mithuna Thottethodi, T. N. Vijaykumar
2010SIGCOMMEffiCuts: optimizing packet classification for memory and throughput.Balajee Vamanan, Gwendolyn Voskuilen, T. N. Vijaykumar
2008MICROShapeshifter: Dynamically changing pipeline width and speed to address process variations.Eric Chun, Zeshan Chishti, T. N. Vijaykumar
2008PLDIAutomatic volume management for programmable microfluidics.Ahmed M. Amin, Mithuna Thottethodi, T. N. Vijaykumar, Steven Wereley, Stephen C. Jacobson
2007DSNBlackJack: Hard Error Detection with Redundant Threads on SMT.Ethan Schuchman, T. N. Vijaykumar
2007ISCAAquacore: a programmable architecture for microfluidics.Ahmed M. Amin, Mithuna Thottethodi, T. N. Vijaykumar, Steven Wereley, Stephen C. Jacobson
2007ISLPEDResource area dilation to reduce power density in throughput servers.Michael D. Powell, T. N. Vijaykumar
2007PPoPPSpeculative thread decomposition through empirical optimization.Troy A. Johnson, Rudolf Eigenmann, T. N. Vijaykumar
2006ASPLOSA program transformation and architecture support for quantum uncomputation.Ethan Schuchman, T. N. Vijaykumar
2006ICCDPesticide: Using SMT Processors to Improve Performance of Pointer Bug Detection.Jin-Yi Wang, Yen-Shiang Shue, T. N. Vijaykumar, Saurabh Bagchi
2005HPCAHeat Stroke: Power-Density-Based Denial of Service in SMT.Jahangir Hasan, Ankit Jalote, T. N. Vijaykumar, Carla E. Brodley
2005ISCAOptimizing Replication, Communication, and Capacity Allocation in CMPs.Zeshan Chishti, Michael D. Powell, T. N. Vijaykumar
2005ISCAOpportunistic Transient-Fault Detection.Mohamed A. Gomaa, T. N. Vijaykumar
2005ISCARescue: A Microarchitecture for Testability and Defect Tolerance.Ethan Schuchman, T. N. Vijaykumar
2005MICROBalancing Resource Utilization to Mitigate Power Density in Processor Pipelines.Michael D. Powell, Ethan Schuchman, T. N. Vijaykumar
2005SIGCOMMDynamic pipelining: making IP-lookup truly scalable.Jahangir Hasan, T. N. Vijaykumar
2004ASPLOSSoftware prefetching for mark-sweep garbage collection: hardware analysis and software redesign.Chen-Yong Cher, Antony L. Hosking, T. N. Vijaykumar
2004ASPLOSHeat-and-run: leveraging SMT and CMP to manage power density through the operating system.Mohamed A. Gomaa, Michael D. Powell, T. N. Vijaykumar
2004ISCAExploiting Resonant Behavior to Reduce Inductive Noise.Michael D. Powell, T. N. Vijaykumar
2004ISCAWire Delay is Not a Problem for SMT (In the Near Future).T. N. Vijaykumar, Zeshan Chishti
2004PLDIMin-cut program decomposition for thread-level speculation.Troy A. Johnson, Rudolf Eigenmann, T. N. Vijaykumar
2003DATEExploring High Bandwidth Pipelined Cache Architecture for Scaled Technology.Amit Agarwal, Kaushik Roy, T. N. Vijaykumar
2003HPCADeterministic Clock Gating for Microprocessor Power Reduction.Hai Li, Swarup Bhunia, Yiran Chen, T. N. Vijaykumar, Kaushik Roy
2003ISCATransient-Fault Recovery for Chip Multiprocessors.Mohamed A. Gomaa, Chad Scarbrough, Irith Pomeranz, T. N. Vijaykumar
2003ISCAEfficient Use of Memory Bandwidth to Improve Network Processor Throughput.Jahangir Hasan, Satish Chandra, T. N. Vijaykumar
2003ISCAIimplicitly-Multithreaded Processors.Il Park, Babak Falsafi, T. N. Vijaykumar
2003ISCAPipeline Damping: A Microarchitectural Technique to Reduce Inductive Noise in Supply Voltage.Michael D. Powell, T. N. Vijaykumar
2003ISLPEDPipeline muffling and a priori current ramping: architectural techniques to reduce high-frequency inductive noise.Michael D. Powell, T. N. Vijaykumar
2003ISPASSAccelerating private-key cryptography via multithreading on symmetric multiprocessors.Praveen Dongara, T. N. Vijaykumar
2003MICRODistance Associativity for High-Performance Energy-Efficient Non-Uniform Cache Architectures.Zeshan Chishti, Michael D. Powell, T. N. Vijaykumar
2003MICROVSV: L2-Miss-Driven Variable Supply-Voltage Scaling for Low Power.Hai Li, Chen-Yong Cher, T. N. Vijaykumar, Kaushik Roy
2003MICROReducing Design Complexity of the Load/Store Queue.Il Park, Chong-liang Ooi, T. N. Vijaykumar
2002HPCAExploiting Choice in Resizable Cache Design to Optimize Deep-Submicron Processor Energy-Delay.Se-Hyun Yang, Michael D. Powell, Babak Falsafi, T. N. Vijaykumar
2002ISCATransient-Fault Recovery Using Simultaneous Multithreading.T. N. Vijaykumar, Irith Pomeranz, Karl Cheng
2002MICROReducing register ports for higher speed and lower energy.Il Park, Michael D. Powell, T. N. Vijaykumar
2001HPCAAn Integrated Circuit/Architecture Approach to Reducing Leakage in Deep-Submicron High-Performance I-Caches.Se-Hyun Yang, Michael D. Powell, Babak Falsafi, Kaushik Roy, T. N. Vijaykumar
2001ICSMultiplex: unifying conventional and speculative thread-level parallelism on a chip multiprocessor.Chong-liang Ooi, Seon Wook Kim, Il Park, Rudolf Eigenmann, Babak Falsafi, T. N. Vijaykumar
2001MICROSkipper: a microarchitecture for exploiting control-flow independence.Chen-Yong Cher, T. N. Vijaykumar
2001MICROReducing set-associative cache energy via way-prediction and selective direct-mapping.Michael D. Powell, Amit Agarwal, T. N. Vijaykumar, Babak Falsafi, Kaushik Roy
2001PPoPPReference idempotency analysis: a framework for optimizing speculative execution.Seon Wook Kim, Chong-liang Ooi, Rudolf Eigenmann, Babak Falsafi, T. N. Vijaykumar
2000ISLPEDGated-VMichael D. Powell, Se-Hyun Yang, Babak Falsafi, Kaushik Roy, T. N. Vijaykumar
1999ISCAIs SC + ILP=RC?Chris Gniady, Babak Falsafi, T. N. Vijaykumar
1998HPCASpeculative Versioning Cache.Sridhar Gopal, T. N. Vijaykumar, James E. Smith, Gurindar S. Sohi
1998ISCAMultiscalar Processors.Gurindar S. Sohi, Scott E. Breach, T. N. Vijaykumar
1998MICROTask Selection for a Multiscalar Processor.T. N. Vijaykumar, Gurindar S. Sohi
1997ISCADynamic Speculation and Synchronization of Data Dependences.Andreas Moshovos, Scott E. Breach, T. N. Vijaykumar, Gurindar S. Sohi
1995ISCAMultiscalar Processors.Gurindar S. Sohi, Scott E. Breach, T. N. Vijaykumar
1994MICROThe anatomy of the register file in a multiscalar processor.Scott E. Breach, T. N. Vijaykumar, Gurindar S. Sohi