T. Raju Damarla
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
2
Active years
1995–1996
Best venue rank
National
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 1996 | VTS | Faulty chip identification in a multi chip module system. | T. Raju Damarla, Moon J. Chung, Wei Su, Gerald T. Michael |
| 1995 | ASPDAC | A built-in self test scheme for VLSI. | T. Raju Damarla, Wei Su, Gerald T. Michael, Moon J. Chung, Charles E. Stroud |
| 1995 | VTS | Improving the efficiency of error identification via signature analysis. | Charles E. Stroud, T. Raju Damarla |