Taavi Viilukas
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
3
Active years
2006–2011
Best venue rank
B
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2011 | ETS | Constraint-Based Hierarchical Untestability Identification for Synchronous Sequential Circuits. | Jaan Raik, Anna Rannaste, Maksim Jenihhin, Taavi Viilukas, Raimund Ubar, Hideo Fujiwara |
| 2010 | DDECS | Constraint-based test pattern generation at the Register-Transfer Level. | Taavi Viilukas, Jaan Raik, Maksim Jenihhin, Raimund Ubar, Anna Krivenko |
| 2006 | DSD | High-Level Decision Diagram based Fault Models for Targeting FSMs. | Jaan Raik, Raimund Ubar, Taavi Viilukas |